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Room-temperature chip-stack interconnection using compliant bumps and wedge-incorporated electrodes

  • Naoya Watanabe
  • , Tanemasa Asano

研究成果: 書籍/レポート タイプへの寄稿 › 会議への寄与

抄録

We propose room-temperature chip-stack interconnection using mechanical caulking between compliant bumps and wedge-incorporated electrodes. In this method, cone-shaped compliant bumps made of Au are pressed into wedgeincorporated electrodes made of Au at room temperature in the ambient air. Because of the edge structures of the Au wedge incorporated electrodes, the pressing load is effectively applied to the interfaces between Au cone bumps and Au wedge-incorporated electrodes. Therefore, Au wedgeincorporated electrodes are caulked with Au cone bumps at low pressing load. By using this method, high-density interchip connections were realized at 0.50 gf/bump and 30 °C. The number of inter-chip connections realized was 30,600 with 20 μm pitch. It is also demonstrated that this method allows lower inter-chip connection resistance than the mechanical caulking between compliant bumps and doughnut-shaped electrodes

本文言語英語
ホスト出版物のタイトル2010 Proceedings 60th Electronic Components and Technology Conference, ECTC 2010
ページ1763-1768
ページ数6
DOI
出版ステータス出版済み - 2010
イベント60th Electronic Components and Technology Conference, ECTC 2010 - Las Vegas, NV, 米国
継続期間: 6月 1 2010 → 6月 4 2010

出版物シリーズ

名前Proceedings - Electronic Components and Technology Conference
ISSN(印刷版)0569-5503

その他

その他60th Electronic Components and Technology Conference, ECTC 2010
国/地域米国
CityLas Vegas, NV
Period6/1/10 → 6/4/10

!!!All Science Journal Classification (ASJC) codes

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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