抄録
Defects generated during the temperature ramping process were evaluated by photoluminescence (PL) for Si/SiGe/Si-on-insulater structure, which is the typical structure for SiGe-on-insulator (SGOI) virtual substrate fabrication using the Ge condensation by dry oxidation. The free exciton peaks were clearly observed for the as grown wafers and decreased with the increase of annealing temperature. Defect-related PL signals at around 0.82, 0.88, 0.95 and 1.0 eV were observed and they also varied according to the annealing temperature and SiGe thickness. The defect-related PL signals were also correlated to dislocation-related defects by transmission electron microscopy (TEM).
本文言語 | 英語 |
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ホスト出版物のタイトル | ICSICT-2006 |
ホスト出版物のサブタイトル | 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings |
ページ | 2193-2195 |
ページ数 | 3 |
DOI | |
出版ステータス | 出版済み - 8月 2 2007 |
イベント | ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology - Shanghai, 中国 継続期間: 10月 23 2006 → 10月 26 2006 |
その他
その他 | ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology |
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国/地域 | 中国 |
City | Shanghai |
Period | 10/23/06 → 10/26/06 |
!!!All Science Journal Classification (ASJC) codes
- 電子工学および電気工学