Novel test methodology for core-based system LSIs and a testing time minimization problem

Makoto Sugihara, Hiroshi Date, Hiroto Yasuura

研究成果: 書籍/レポート タイプへの寄稿会議への寄与

50 被引用数 (Scopus)

抄録

In this paper, we propose a novel test methodology for core-based system LSIs. Our test methodology aims to decrease testing time for core-based system LSIs. Considering testing time reduction, our test methodology is based on BIST and ATPG. The main contributions of this paper are summarized as follows. (i). BIST is efficiently combined with external testing to relax the limitation of the external primary inputs and outputs. (ii). External testing for one of cores and BISTs for the others are performed in parallel to reduce the total testing time. (iii). The testing time minimization problem for core-based system LSIs is formulated as a combinatorial optimization problem to select the optimal set of test vectors from given sets of test vectors for each core.

本文言語英語
ホスト出版物のタイトルIEEE International Test Conference (TC)
編集者 Anon
ページ465-472
ページ数8
DOI
出版ステータス出版済み - 1998
外部発表はい
イベントProceedings of the 1998 IEEE International Test Conference - Washington, DC, USA
継続期間: 10月 18 199810月 21 1998

出版物シリーズ

名前IEEE International Test Conference (TC)
ISSN(印刷版)1089-3539

その他

その他Proceedings of the 1998 IEEE International Test Conference
CityWashington, DC, USA
Period10/18/9810/21/98

!!!All Science Journal Classification (ASJC) codes

  • 電子工学および電気工学
  • 応用数学

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