TY - JOUR
T1 - Low temperature (210 °C) fabrication of Ge MOS capacitor and controllability of its flatband voltage
AU - Kuwazuru, Hajime
AU - Aso, Taisei
AU - Wang, Dong
AU - Yamamoto, Keisuke
N1 - Publisher Copyright:
© 2024 Elsevier Ltd
PY - 2024/8/1
Y1 - 2024/8/1
N2 - Germanium (Ge) and germanium tin (GeSn) are strong candidate materials for novel electronic device such as spin MOS field-effect transistor (FET) or flexible devices. A high-quality insulating layer on Ge(Sn) should be formed at low temperatures to realize these applications. In this study, we fabricated a Ge MOS capacitor (CAP) and n-MOSFET with a SiO2/GeO2 gate dielectric using an electron cyclotron resonance plasma process and subsequent post-deposition annealing at a low temperature of 210 °C. The MOSCAPs show the typical electrical characteristics without significant degradation compared with the samples fabricated at a higher temperature of 450 °C. The n-MOSFET shows distinct output characteristics with clear saturation behavior and high current drivability. From the flatband voltage comparison among different annealing temperatures, high-temperature annealing induces the interface dipole formation in the gate insulator, significantly shifting flatband voltage to a negative direction. X-ray photoelectron spectroscopy analysis suggests that the origin of the interface dipole is oxygen atom movement at a SiO2/GeO2 interface. This information will be an important guideline for fabricating a high-quality insulator on Ge(Sn) at low temperatures.
AB - Germanium (Ge) and germanium tin (GeSn) are strong candidate materials for novel electronic device such as spin MOS field-effect transistor (FET) or flexible devices. A high-quality insulating layer on Ge(Sn) should be formed at low temperatures to realize these applications. In this study, we fabricated a Ge MOS capacitor (CAP) and n-MOSFET with a SiO2/GeO2 gate dielectric using an electron cyclotron resonance plasma process and subsequent post-deposition annealing at a low temperature of 210 °C. The MOSCAPs show the typical electrical characteristics without significant degradation compared with the samples fabricated at a higher temperature of 450 °C. The n-MOSFET shows distinct output characteristics with clear saturation behavior and high current drivability. From the flatband voltage comparison among different annealing temperatures, high-temperature annealing induces the interface dipole formation in the gate insulator, significantly shifting flatband voltage to a negative direction. X-ray photoelectron spectroscopy analysis suggests that the origin of the interface dipole is oxygen atom movement at a SiO2/GeO2 interface. This information will be an important guideline for fabricating a high-quality insulator on Ge(Sn) at low temperatures.
UR - http://www.scopus.com/inward/record.url?scp=85190720400&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85190720400&partnerID=8YFLogxK
U2 - 10.1016/j.mssp.2024.108427
DO - 10.1016/j.mssp.2024.108427
M3 - Article
AN - SCOPUS:85190720400
SN - 1369-8001
VL - 178
JO - Materials Science in Semiconductor Processing
JF - Materials Science in Semiconductor Processing
M1 - 108427
ER -