(Invited) Border-Trap Characterization for Ge Gate Stacks with Thin GeOX layer Using Deep-Level Transient Spectroscopy

Hiroshi Nakashima, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang

研究成果: ジャーナルへの寄稿学術誌査読

抄録

The deep-level transient spectroscopy (DLTS) measurements for the SiO2/GeO2/Ge gate stacks represent the different pulse height dependences of the border trap (BT) signals for p- and n-MOSCAPs. We propose the tunneling models to/from BT in GeO2 to explain the difference. Based on this model, the BTs in Al2O3/GeOx/p-Ge gate stacks were characterized using DLTS. Through evaluating the gate stacks with different GeOx thickness, the respective BTs in Al2O3, Al2O3/GeOx interface region, and GeOx were detected. The density of BT (Nbt) in Al2O3 (6~9 × 1017 cm-3) is lower than those in GeOx (~2 × 1018 cm-3), and the highest Nbt (~1 × 1019 cm-3) was found in Al2O3/GeOx interface region. Ge p-MOSFETs with Al2O3/GeOx/p-Ge gate stacks were fabricated and analyzed. We confirmed that the ITs and the BTs near to valence band edge of Ge affect the effective mobility of Ge p-MOSFETs in high field region.
本文言語英語
ページ(範囲)395-404
ページ数10
ジャーナルECS Transactions
98
5
DOI
出版ステータス出版済み - 9月 8 2020

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