Grain positioning using metal imprint technology for single-grain Si thin-film transistor

Kenji Makihira, Masahito Yoshii, Tanemasa Asano

研究成果: ジャーナルへの寄稿学術誌査読

1 被引用数 (Scopus)

抄録

We prepared a large-grain silicon thin film by a new solid-phase crystallization technology called metal imprint technology, fabricated a prototype of a quasi-single-crystal silicon (Si) thin-film transistor (TFT), and evaluated its performance. Metal imprint technology presses a chip array coated by metal onto amorphous silicon and promotes the nucleation in solid-phase crystallization by the metal transferred to a small area. By using nickel (Ni) in the imprinting, we found that the incubation time could be significantly decreased, and large grains could be formed at any desired positions. The grains we obtained had a 〈111〉 orientation. An average 7-μm grain size was obtained by annealing at 560 °C. This technology was used to fabricate TFT that positioned the channel region in a single grain. The fabricated TFT exhibited excellent performance in the field effect mobilities of 400 cm2/Vs in the n-channel and 220 cm2/Vs in the p-channel. We found that dispersion in mobility of TFTs could be reduced to one-half of the dispersion of polycrystalline-Si TFT that was crystallized in the conventional solid phase. Threshold voltages had excellent uniformity and were about one-half of those of a conventional solid-phase crystallized TFT.

本文言語英語
ページ(範囲)45-51
ページ数7
ジャーナルElectronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi)
86
5
DOI
出版ステータス出版済み - 5月 2003

!!!All Science Journal Classification (ASJC) codes

  • 物理学および天文学一般
  • コンピュータ ネットワークおよび通信
  • 電子工学および電気工学

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