TY - JOUR
T1 - GaN-based complementary metal-oxide- semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation-induced holes and electron channels
AU - Nakajima, Akira
AU - Kubota, Shunsuke
AU - Tsutsui, Kazuo
AU - Kakushima, Kuniyuki
AU - Wakabayashi, Hitoshi
AU - Iwai, Hiroshi
AU - Nishizawa, Shin Ichi
AU - Ohashi, Hiromichi
PY - 2018/4/10
Y1 - 2018/4/10
N2 - Gallium nitride (GaN)-based P-channel (Pch) and N-channel (Nch) metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off operations were realised. Both Pch and Nch MOSFETs were monolithically fabricated in a polarisation-junction platform wafer. The platform wafer was constructed with a GaN/aluminium GaN/GaN double heterostructure, which has both two-dimensional hole gas (2DHG) and 2D electron gas (2DEG). The drain currents of Pch and Nch MOSFETs flow through 2DHG and 2DEG, respectively. The threshold gate voltages of the fabricated Pch and Nch MOSFETs were -2.7 and 6.7 V, respectively. It was shown that the threshold voltage and the on-state resistance of the Pch MOSFET can be controlled by adjusting the 2DEG potential. Furthermore, using Pch and Nch MOSFETs, complementary MOS inverter operation was demonstrated.
AB - Gallium nitride (GaN)-based P-channel (Pch) and N-channel (Nch) metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off operations were realised. Both Pch and Nch MOSFETs were monolithically fabricated in a polarisation-junction platform wafer. The platform wafer was constructed with a GaN/aluminium GaN/GaN double heterostructure, which has both two-dimensional hole gas (2DHG) and 2D electron gas (2DEG). The drain currents of Pch and Nch MOSFETs flow through 2DHG and 2DEG, respectively. The threshold gate voltages of the fabricated Pch and Nch MOSFETs were -2.7 and 6.7 V, respectively. It was shown that the threshold voltage and the on-state resistance of the Pch MOSFET can be controlled by adjusting the 2DEG potential. Furthermore, using Pch and Nch MOSFETs, complementary MOS inverter operation was demonstrated.
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U2 - 10.1049/iet-pel.2017.0376
DO - 10.1049/iet-pel.2017.0376
M3 - Article
AN - SCOPUS:85045698612
SN - 1755-4535
VL - 11
SP - 689
EP - 694
JO - IET Power Electronics
JF - IET Power Electronics
IS - 4
ER -