Effect of solder junction void variation in power semiconductor package on power cycle lifetime

Power semiconductor modules, such as IGBT and power MOSFET modules, have been increasingly used due to the growing application market, such as electric vehicles and renewable energy. A long lifetime of power semiconductor modules is strongly required, and the power cycle test is an important evaluation. Cracks in the mount solder of power semiconductor package are one of the main factors affecting the power cycle lifetime due to the increase in thermal resistance. Variations in the mounting process during the package assembly may lead to solder voids in the initial state, causing stress within the solder joint and influencing the power cycle lifetime. This paper reports the effect of the void ratio of chip mount solder on power cycle lifetime. Samples with intentionally varied initial void ratios and void positions were fabricated, and their power cycle lifetimes were evaluated. The results show that the power cycle lifetime is determined by the Coffin-Manson law, even with different void ratios and positions.