TY - JOUR
T1 - C3-VQA
T2 - Cryogenic Counter-Based Coprocessor for Variational Quantum Algorithms
AU - Ueno, Yosuke
AU - Imamura, Satoshi
AU - Tomida, Yuna
AU - Tanimoto, Teruo
AU - Tanaka, Masamitsu
AU - Tabuchi, Yutaka
AU - Inoue, Koji
AU - Nakamura, Hiroshi
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2025
Y1 - 2025
N2 - Cryogenic quantum computers play a leading role in demonstrating quantum advantage. Given the severe constraints on the cooling capacity in cryogenic environments, thermal design is crucial for the scalability of these computers. The sources of heat dissipation include passive inflow via intertemperature wires and the power consumption of components located in the cryostat, such as wire amplifiers and quantum-classical interfaces. Thus, a critical challenge is to reduce the number of wires by reducing the required intertemperature bandwidth while maintaining minimal additional power consumption in the cryostat. One solution to address this challenge is near-data processing using ultralow-power computational logic within the cryostat. Based on the workload analysis and domain-specific system design focused on variational quantum algorithms (VQAs), we propose the cryogenic counter-based coprocessor for VQAs (C3-VQA) to enhance the design scalability of cryogenic quantum computers under the thermal constraint. The C3-VQA utilizes single-flux-quantum logic, which is an ultralow-power superconducting digital circuit that operates at the 4 K environment. The C3-VQA precomputes a part of the expectation value calculations for VQAs and buffers intermediate values using simple bit operation units and counters in the cryostat, thereby reducing the required intertemperature bandwidth with small additional power consumption. Consequently, the C3-VQA reduces the number of wires, leading to a reduction in the total heat dissipation in the cryostat. Our evaluation shows that the C3-VQA reduces the total heat dissipation at the 4 K stage by 30% and 81% under sequential-shot and parallel-shot execution scenarios, respectively. Furthermore, a case study in quantum chemistry shows that the C3-VQA reduces total heat dissipation by 87% with a 10 000-qubit system.
AB - Cryogenic quantum computers play a leading role in demonstrating quantum advantage. Given the severe constraints on the cooling capacity in cryogenic environments, thermal design is crucial for the scalability of these computers. The sources of heat dissipation include passive inflow via intertemperature wires and the power consumption of components located in the cryostat, such as wire amplifiers and quantum-classical interfaces. Thus, a critical challenge is to reduce the number of wires by reducing the required intertemperature bandwidth while maintaining minimal additional power consumption in the cryostat. One solution to address this challenge is near-data processing using ultralow-power computational logic within the cryostat. Based on the workload analysis and domain-specific system design focused on variational quantum algorithms (VQAs), we propose the cryogenic counter-based coprocessor for VQAs (C3-VQA) to enhance the design scalability of cryogenic quantum computers under the thermal constraint. The C3-VQA utilizes single-flux-quantum logic, which is an ultralow-power superconducting digital circuit that operates at the 4 K environment. The C3-VQA precomputes a part of the expectation value calculations for VQAs and buffers intermediate values using simple bit operation units and counters in the cryostat, thereby reducing the required intertemperature bandwidth with small additional power consumption. Consequently, the C3-VQA reduces the number of wires, leading to a reduction in the total heat dissipation in the cryostat. Our evaluation shows that the C3-VQA reduces the total heat dissipation at the 4 K stage by 30% and 81% under sequential-shot and parallel-shot execution scenarios, respectively. Furthermore, a case study in quantum chemistry shows that the C3-VQA reduces total heat dissipation by 87% with a 10 000-qubit system.
KW - Quantum computing
KW - single-flux-quantum (SFQ) logic
KW - variational quantum algorithm (VQA)
UR - https://www.scopus.com/pages/publications/85213461557
UR - https://www.scopus.com/pages/publications/85213461557#tab=citedBy
U2 - 10.1109/TQE.2024.3521442
DO - 10.1109/TQE.2024.3521442
M3 - Article
AN - SCOPUS:85213461557
SN - 2689-1808
VL - 6
JO - IEEE Transactions on Quantum Engineering
JF - IEEE Transactions on Quantum Engineering
M1 - 3100317
ER -