TY - JOUR
T1 - Al2O3 growth on Ge by low-temperature (∼90 °C) atomic layer deposition and its application for MOS devices
AU - Aso, Taisei
AU - Kuwazuru, Hajime
AU - Wang, Dong
AU - Yamamoto, Keisuke
N1 - Publisher Copyright:
© 2025 The Authors
PY - 2025/5
Y1 - 2025/5
N2 - A low-temperature device process is necessary for germanium (Ge) and germanium tin (GeSn)-based novel electronics/optics/spintronics/flexible device applications. Concerning insulating layer formation for gate stack and passivation layer, atomic layer deposition (ALD) has been widely studied and applied due to advantages, as exemplified by precise film thickness control and excellent step coverage. However, low-temperature ALD has not been applied to the abovementioned Ge(Sn)-based novel devices. In this study, we investigated Al₂O₃ deposition using low-temperature (∼90 °C) ALD (without sample heating) on Ge substrates and examined methods to enhance film quality and electrical properties. We found that direct low-temperature ALD on Ge led to dimple formation, which we attribute to uneven ALD growth caused by variations in surface hydrophilicity. To avoid this, we introduced a GeO₂ underlayer formed by electron cyclotron resonance (ECR) plasma before low-temperature ALD, successfully preventing dimples and improving surface uniformity. The resulting Al/Al₂O₃/GeO₂/Ge metal-oxide-semiconductor (MOS) capacitor demonstrated enhanced electrical characteristics. Additionally, a MOS field-effect transistor (FET) with gate stacks fabricated at a maximum gate stack process temperature of 130 °C exhibited typical operational behavior. This low-temperature ALD approach offers a promising pathway for low-temperature gate stack and passivation layer fabrication in emerging Ge(Sn)-based device applications.
AB - A low-temperature device process is necessary for germanium (Ge) and germanium tin (GeSn)-based novel electronics/optics/spintronics/flexible device applications. Concerning insulating layer formation for gate stack and passivation layer, atomic layer deposition (ALD) has been widely studied and applied due to advantages, as exemplified by precise film thickness control and excellent step coverage. However, low-temperature ALD has not been applied to the abovementioned Ge(Sn)-based novel devices. In this study, we investigated Al₂O₃ deposition using low-temperature (∼90 °C) ALD (without sample heating) on Ge substrates and examined methods to enhance film quality and electrical properties. We found that direct low-temperature ALD on Ge led to dimple formation, which we attribute to uneven ALD growth caused by variations in surface hydrophilicity. To avoid this, we introduced a GeO₂ underlayer formed by electron cyclotron resonance (ECR) plasma before low-temperature ALD, successfully preventing dimples and improving surface uniformity. The resulting Al/Al₂O₃/GeO₂/Ge metal-oxide-semiconductor (MOS) capacitor demonstrated enhanced electrical characteristics. Additionally, a MOS field-effect transistor (FET) with gate stacks fabricated at a maximum gate stack process temperature of 130 °C exhibited typical operational behavior. This low-temperature ALD approach offers a promising pathway for low-temperature gate stack and passivation layer fabrication in emerging Ge(Sn)-based device applications.
KW - Atomic layer deposition
KW - Gate stack
KW - Ge
KW - Low-temperature process
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U2 - 10.1016/j.mssp.2025.109372
DO - 10.1016/j.mssp.2025.109372
M3 - Article
AN - SCOPUS:85217078242
SN - 1369-8001
VL - 190
JO - Materials Science in Semiconductor Processing
JF - Materials Science in Semiconductor Processing
M1 - 109372
ER -