Underlayer selection to improve the performance of polycrystalline Ge thin film transistors

Toshifumi Imajo, Kenta Moto, Keisuke Yamamoto, Takashi Suemasu, Hiroshi Nakashima, Kaoru Toko

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

We fabricated accumulation-mode metal source/drain p-channel thin film transistors using solid-phase crystallized Ge with different thickness formed on glass substrate. By thinning the Ge layer with the largest grain size (3.7 μm), the channel region got fully-depleted, and the TFT exhibited both high on/off current ratio (~102) and field effect mobility (170 cm2 V-1 s-1). We prepared interfacial layers (GeO2 and Al2O3) between Ge and the substrate to achieve a high Hall hole mobility with a thin film, which is the key for improving TFT characteristics. As a result, inserting Al2O3 underlayer improved the electrical properties of thin Ge (50 nm) layers.

Original languageEnglish
Title of host publicationPRiME 2020
Subtitle of host publicationSiGe, Ge, and Related Compounds: Materials, Processing, and Devices 9
EditorsQ. Liu, J. M. Hartmann, J. R. Holt, X. Gong, V. Jain, G. Niu, G. Masini, A. Ogura, S. Miyazaki, M. Ostling, W. Bi, A. Schulze, A. Mai
PublisherIOP Publishing Ltd.
Pages423-427
Number of pages5
Edition5
ISBN (Electronic)9781607689003
DOIs
Publication statusPublished - 2020
EventPacific Rim Meeting on Electrochemical and Solid State Science 2020, PRiME 200 - Honolulu, United States
Duration: Oct 4 2020Oct 9 2020

Publication series

NameECS Transactions
Number5
Volume98
ISSN (Print)1938-6737
ISSN (Electronic)1938-5862

Conference

ConferencePacific Rim Meeting on Electrochemical and Solid State Science 2020, PRiME 200
Country/TerritoryUnited States
CityHonolulu
Period10/4/2010/9/20

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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