TY - GEN
T1 - Throughput Enhancement with Hardware Accelerated Resource Scheduler in Low-Latency 5G Systems
AU - Arikawa, Yuki
AU - Sakamoto, Takeshi
AU - Kimura, Shunji
AU - Shigematsu, Satoshi
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/12/18
Y1 - 2018/12/18
N2 - This paper discusses a throughput enhancement technique for a coordinated radio-resource scheduler with a hardware accelerator in low-latency 5G mobile communications systems. In these 5G systems, the scheduler will have to search for the optimal combination of antennas and mobile terminals (MTs) from a huge number of possibilities within a sub-millisecond scheduling period. Without increasing the computational resource, it would be difficult to obtain the optimal combination when the number of accommodated MTs is large. To overcome this issue, the system throughput enhancement technique dynamically controls the search space on the basis of the number of MTs. This enables the scheduler to quickly approach the optimal combination under the computational resource constraint. Simulated results revealed that the scheduler with a hardware accelerator of 15.1 Mgates can search for the optimal combination that achieves higher system throughput within a 0.2-ms scheduling period. By dynamically controlling the search space, the scheduler performs effectively regardless of the number of MTs. The new scheduler will enable a practical future low-latency 5G system.
AB - This paper discusses a throughput enhancement technique for a coordinated radio-resource scheduler with a hardware accelerator in low-latency 5G mobile communications systems. In these 5G systems, the scheduler will have to search for the optimal combination of antennas and mobile terminals (MTs) from a huge number of possibilities within a sub-millisecond scheduling period. Without increasing the computational resource, it would be difficult to obtain the optimal combination when the number of accommodated MTs is large. To overcome this issue, the system throughput enhancement technique dynamically controls the search space on the basis of the number of MTs. This enables the scheduler to quickly approach the optimal combination under the computational resource constraint. Simulated results revealed that the scheduler with a hardware accelerator of 15.1 Mgates can search for the optimal combination that achieves higher system throughput within a 0.2-ms scheduling period. By dynamically controlling the search space, the scheduler performs effectively regardless of the number of MTs. The new scheduler will enable a practical future low-latency 5G system.
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U2 - 10.1109/PIMRC.2018.8580974
DO - 10.1109/PIMRC.2018.8580974
M3 - Conference contribution
AN - SCOPUS:85060539809
T3 - IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC
BT - 2018 IEEE 29th Annual International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 29th IEEE Annual International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2018
Y2 - 9 September 2018 through 12 September 2018
ER -