Source/drain junction fabrication for Ge metal-oxide-semiconductor field-effect transistors

We established fabrication methods for high-quality Ge n ⁺/p and p ⁺/n junctions using thermal diffusion of P and implantation of B, respectively. The carrier concentrations in n ⁺ and p ⁺ layers were as high as 4 × 10 ¹⁹ and 2 × 10 ¹⁹ cm ^{- 3}, respectively. It was found that a peripheral surface-state current dominates the reverse leakage current in an n ⁺/p junction diode. The protection of junction surfaces from plasma damage during the SiO ₂ deposition was essential to achieve high-quality source/drain junctions. The surface passivation with a GeO ₂ interlayer was harmful to an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) because of an increase in a surface leakage current due to inversion carriers. For a p-channel MOSFET, on the other hand, the GeO ₂ interlayer plays a role in decreasing the surface leakage current.