Soft-core processor architecture for embedded system design

Eko Fajar Nurprasetyo, Akihiko Inoue, Hiroyuki Tomiyama, Hiroto Yasuura

Research output: Contribution to journalArticlepeer-review

19 Citations (Scopus)


In the design of an embedded system, an architecture of core processor strongly affects the performance and cost of the total system. This paper discusses a scalable processor architecture, called soft-core processor, which can be tuned for a target system. System designers can optimize several design parameters such as the datapath width and instruction set, and generate customized processors for their application. Design of Bung-DLX as a prototype of soft-core processor is presented in this paper. An experiment of system design using our processor has shown that the optimized processor chip area halves when the critical path delay is reduced to one third of the original one.

Original languageEnglish
Pages (from-to)1416-1422
Number of pages7
JournalIEICE Transactions on Electronics
Issue number9
Publication statusPublished - 1998
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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