Semantics of a hardware design language for Japanese standardization

The authors propose a novel approach to the defining of the formal semantics of a hardware design language (HDL) in the Japanese LSI design language standardization project. The approach is to separate the definition of semantics from simulators. Since the semantics includes nondeterminism, it is possible to describe the vagueness of circuit behavior such as dispersion of delays without linguistic ambiguity. The authors introduce a new computation model of hardware behavior called the NES (nondeterministic event sequence) model. The NES model is a very simple model of computation in digital systems and provides an intuitive understanding of the concurrent behavior of HDL description without loss of mathematical strictness.