TY - GEN
T1 - Routing architecture and algorithms for a superconductivity circuits-based computing hardware
AU - Mehdipour, Farhad
AU - Honda, Hiroaki
AU - Kataoka, Hiroshi
AU - Inoue, Koji
AU - Murakami, Kazuaki
N1 - Copyright:
Copyright 2011 Elsevier B.V., All rights reserved.
PY - 2011
Y1 - 2011
N2 - Dedicated tools for placing and routing data flow graphs extracted from computation-intensive applications are basic requirements for developing applications on a large-scale reconfigurable data-path processor (LSRDP) implemented by superconductivity circuits. Using an alternative technology instead of CMOS circuits for implementing such hardware entails considering particular constraints and conditions from the architecture and tools development perspectives. The main contribution of this work is to introduce an operand routing network (ORN) architecture as well as algorithms for routing the nets corresponding to the edges of the data flow graphs. Further, a micro-routing algorithm is proposed for routing and configuring the ORNs internally. These algorithms have been applied on a number of data flow graphs from target applications and the results demonstrate their efficacy.
AB - Dedicated tools for placing and routing data flow graphs extracted from computation-intensive applications are basic requirements for developing applications on a large-scale reconfigurable data-path processor (LSRDP) implemented by superconductivity circuits. Using an alternative technology instead of CMOS circuits for implementing such hardware entails considering particular constraints and conditions from the architecture and tools development perspectives. The main contribution of this work is to introduce an operand routing network (ORN) architecture as well as algorithms for routing the nets corresponding to the edges of the data flow graphs. Further, a micro-routing algorithm is proposed for routing and configuring the ORNs internally. These algorithms have been applied on a number of data flow graphs from target applications and the results demonstrate their efficacy.
UR - http://www.scopus.com/inward/record.url?scp=80053956923&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=80053956923&partnerID=8YFLogxK
U2 - 10.1109/CCECE.2011.6030605
DO - 10.1109/CCECE.2011.6030605
M3 - Conference contribution
AN - SCOPUS:80053956923
SN - 9781424497898
T3 - Canadian Conference on Electrical and Computer Engineering
SP - 977
EP - 980
BT - 2011 Canadian Conference on Electrical and Computer Engineering, CCECE 2011
T2 - 2011 Canadian Conference on Electrical and Computer Engineering, CCECE 2011
Y2 - 8 May 2011 through 11 May 2011
ER -