Abstract
This paper presents Power-Pro architecture (Programmable Power Management Architecture), a novel processor architecture for power reduction. Power-Pro architecture has following two functionalities, (i) Supply voltage and clock frequency can be dynamically varied, (ii) Active data-path width can be dynamically adjusted to requirement of application programs. For the application programs which require less performance or less data-path width, Power-Pro architecture realize dramatic power reduction.
Original language | English |
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Pages | 321-322 |
Number of pages | 2 |
Publication status | Published - 1998 |
Externally published | Yes |
Event | Proceedings of the 1998 3rd Conference of the Asia and South Pacific Design Automation (ASP-DAC '98) - Yokohama, Jpn Duration: Feb 10 1998 → Feb 13 1998 |
Conference
Conference | Proceedings of the 1998 3rd Conference of the Asia and South Pacific Design Automation (ASP-DAC '98) |
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City | Yokohama, Jpn |
Period | 2/10/98 → 2/13/98 |
All Science Journal Classification (ASJC) codes
- Computer Science Applications
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering