TY - GEN
T1 - Power Loss Reduction of Low-Voltage Power MOSFET by Combination of Assist Gate Structure and Gate Control Technology
AU - Saito, Wataru
AU - Nishizawa, Shin Ichi
N1 - Funding Information:
This work was supported by JSPS KAKENHI Grant Number JP19K23518.
Publisher Copyright:
© 2021 The Institute of Electrical Engineering of Japan.
PY - 2021/5/30
Y1 - 2021/5/30
N2 - A new structure with the optimum gate control is proposed for low power loss operation of low-voltage power MOSFETs. Although the application system requires continuing the on-resistance RonA reduction for more power efficiency improvement, RonA trend is facing the theoretical limit even with the FP technology. Assist Gate (AG) structure was proposed to improve the RonA and turn-off loss Eoff tradeoff, because the channel and drift resistances can be reduced with avoiding the Cgd increase by dual gate control. Dual gate control with synchronous rectify (SR) of AG-MOSFET also improves turn-on switching performance. This paper shows the AG-MOSFET with optimum gate control achieves 27% lower turn-on loss Eon and 42% lower surge current compared with no SR operation. A case study of the half-bridge application also shows 17% to 46% of total power loss reduction.
AB - A new structure with the optimum gate control is proposed for low power loss operation of low-voltage power MOSFETs. Although the application system requires continuing the on-resistance RonA reduction for more power efficiency improvement, RonA trend is facing the theoretical limit even with the FP technology. Assist Gate (AG) structure was proposed to improve the RonA and turn-off loss Eoff tradeoff, because the channel and drift resistances can be reduced with avoiding the Cgd increase by dual gate control. Dual gate control with synchronous rectify (SR) of AG-MOSFET also improves turn-on switching performance. This paper shows the AG-MOSFET with optimum gate control achieves 27% lower turn-on loss Eon and 42% lower surge current compared with no SR operation. A case study of the half-bridge application also shows 17% to 46% of total power loss reduction.
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U2 - 10.23919/ISPSD50666.2021.9452240
DO - 10.23919/ISPSD50666.2021.9452240
M3 - Conference contribution
AN - SCOPUS:85112517300
T3 - Proceedings of the International Symposium on Power Semiconductor Devices and ICs
SP - 271
EP - 274
BT - 2021 33rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 33rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2021
Y2 - 30 May 2021 through 3 June 2021
ER -