Abstract
The computational complexity of unification in first-order logic under parallel computation scheme is discussed. A parallel unification algorithm is presented on a combinational logic circuit model and its complexity is analyzed. In order to discuss the lower bound of parallel time complexity of unification, we show that unification is the one of the hardest problems in the class of problems resolved by polynomial size circuits. Namely, it seems to be difficult to design very efficient parallel algorithm for unification.
| Original language | English |
|---|---|
| Title of host publication | Unknown Host Publication Title |
| Publisher | Ohmsha Ltd |
| Pages | 235-243 |
| Number of pages | 9 |
| ISBN (Print) | 4274072215 |
| Publication status | Published - Dec 1 1984 |
| Externally published | Yes |
All Science Journal Classification (ASJC) codes
- Engineering(all)