Neutron-induced soft error rate estimation for SRAM using PHITS

Shusuke Yoshimoto; Takuro Amashita; Masayoshi Yoshimura; Yusuke Matsunaga; Hiroto Yasuura; Shintaro Izumi; Hiroshi Kawaguchi; Masahiko Yoshimoto

doi:10.1109/IOLTS.2012.6313859

Neutron-induced soft error rate estimation for SRAM using PHITS

Shusuke Yoshimoto, Takuro Amashita, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

This paper presents a novel neutron-induced soft-error-rate (SER) estimation tool with a particle transport code: PHITS. The proposed tool can calculate the SER according to various data patterns and the layout of the memory cells in an SRAM. As layouts, two kinds of an NMOS-PMOS-NMOS 6T and an inside-out PMOS-NMOS-PMOS versions are considered. The proposed tool distinguishes a single-event-upset (SEU) SER, a horizontal multiple-cell-upset (MCU) SER, and a vertical MCU SER using an extracting function. The horizontal MCU SER in the inside-out version of the PMOS-NMOS-PMOS 6T SRAM cell layout was expected to be 26-41% less than that of the general NMOS-PMOS-NMOS 6T cell layout.

Original language	English
Title of host publication	Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012
Pages	138-141
Number of pages	4
DOIs	https://doi.org/10.1109/IOLTS.2012.6313859
Publication status	Published - 2012
Event	2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012 - Sitges, Spain Duration: Jun 27 2012 → Jun 29 2012

Publication series

Name	Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012

Other

Other	2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012
Country/Territory	Spain
City	Sitges
Period	6/27/12 → 6/29/12

All Science Journal Classification (ASJC) codes

Safety, Risk, Reliability and Quality

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10.1109/IOLTS.2012.6313859

Cite this

Yoshimoto, S., Amashita, T., Yoshimura, M., Matsunaga, Y., Yasuura, H., Izumi, S., Kawaguchi, H., & Yoshimoto, M. (2012). Neutron-induced soft error rate estimation for SRAM using PHITS. In Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012 (pp. 138-141). Article 6313859 (Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012). https://doi.org/10.1109/IOLTS.2012.6313859

Neutron-induced soft error rate estimation for SRAM using PHITS. / Yoshimoto, Shusuke; Amashita, Takuro; Yoshimura, Masayoshi et al.
Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012. 2012. p. 138-141 6313859 (Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yoshimoto, S, Amashita, T, Yoshimura, M, Matsunaga, Y, Yasuura, H, Izumi, S, Kawaguchi, H & Yoshimoto, M 2012, Neutron-induced soft error rate estimation for SRAM using PHITS. in Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012., 6313859, Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012, pp. 138-141, 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, 6/27/12. https://doi.org/10.1109/IOLTS.2012.6313859

Yoshimoto S, Amashita T, Yoshimura M, Matsunaga Y, Yasuura H, Izumi S et al. Neutron-induced soft error rate estimation for SRAM using PHITS. In Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012. 2012. p. 138-141. 6313859. (Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012). doi: 10.1109/IOLTS.2012.6313859

@inproceedings{debab81df62647f299a6fefb0d597f8e,

title = "Neutron-induced soft error rate estimation for SRAM using PHITS",

abstract = "This paper presents a novel neutron-induced soft-error-rate (SER) estimation tool with a particle transport code: PHITS. The proposed tool can calculate the SER according to various data patterns and the layout of the memory cells in an SRAM. As layouts, two kinds of an NMOS-PMOS-NMOS 6T and an inside-out PMOS-NMOS-PMOS versions are considered. The proposed tool distinguishes a single-event-upset (SEU) SER, a horizontal multiple-cell-upset (MCU) SER, and a vertical MCU SER using an extracting function. The horizontal MCU SER in the inside-out version of the PMOS-NMOS-PMOS 6T SRAM cell layout was expected to be 26-41% less than that of the general NMOS-PMOS-NMOS 6T cell layout.",

author = "Shusuke Yoshimoto and Takuro Amashita and Masayoshi Yoshimura and Yusuke Matsunaga and Hiroto Yasuura and Shintaro Izumi and Hiroshi Kawaguchi and Masahiko Yoshimoto",

year = "2012",

doi = "10.1109/IOLTS.2012.6313859",

language = "English",

isbn = "9781467320849",

series = "Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012",

pages = "138--141",

booktitle = "Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012",

note = "2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012 ; Conference date: 27-06-2012 Through 29-06-2012",

}

TY - GEN

T1 - Neutron-induced soft error rate estimation for SRAM using PHITS

AU - Yoshimoto, Shusuke

AU - Amashita, Takuro

AU - Yoshimura, Masayoshi

AU - Matsunaga, Yusuke

AU - Yasuura, Hiroto

AU - Izumi, Shintaro

AU - Kawaguchi, Hiroshi

AU - Yoshimoto, Masahiko

PY - 2012

Y1 - 2012

N2 - This paper presents a novel neutron-induced soft-error-rate (SER) estimation tool with a particle transport code: PHITS. The proposed tool can calculate the SER according to various data patterns and the layout of the memory cells in an SRAM. As layouts, two kinds of an NMOS-PMOS-NMOS 6T and an inside-out PMOS-NMOS-PMOS versions are considered. The proposed tool distinguishes a single-event-upset (SEU) SER, a horizontal multiple-cell-upset (MCU) SER, and a vertical MCU SER using an extracting function. The horizontal MCU SER in the inside-out version of the PMOS-NMOS-PMOS 6T SRAM cell layout was expected to be 26-41% less than that of the general NMOS-PMOS-NMOS 6T cell layout.

AB - This paper presents a novel neutron-induced soft-error-rate (SER) estimation tool with a particle transport code: PHITS. The proposed tool can calculate the SER according to various data patterns and the layout of the memory cells in an SRAM. As layouts, two kinds of an NMOS-PMOS-NMOS 6T and an inside-out PMOS-NMOS-PMOS versions are considered. The proposed tool distinguishes a single-event-upset (SEU) SER, a horizontal multiple-cell-upset (MCU) SER, and a vertical MCU SER using an extracting function. The horizontal MCU SER in the inside-out version of the PMOS-NMOS-PMOS 6T SRAM cell layout was expected to be 26-41% less than that of the general NMOS-PMOS-NMOS 6T cell layout.

UR - http://www.scopus.com/inward/record.url?scp=84869171317&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84869171317&partnerID=8YFLogxK

U2 - 10.1109/IOLTS.2012.6313859

DO - 10.1109/IOLTS.2012.6313859

M3 - Conference contribution

AN - SCOPUS:84869171317

SN - 9781467320849

T3 - Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012

SP - 138

EP - 141

BT - Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012

T2 - 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012

Y2 - 27 June 2012 through 29 June 2012

ER -

Neutron-induced soft error rate estimation for SRAM using PHITS

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