Abstract
A multilevel logic optimizer, which is based on the transduction method, is introduced. The original transduction method is good for optimization, but its calculation time and storage area increase exponentially with the number of inputs because of the use of truth tables. To save CPU time and memory space, the authors implemented this algorithm using ordered binary decision diagrams (OBDD) as the data structure for representing logic functions. Since OBDD does not become as large as other representations, it can handle large circuits without partitioning.
| Original language | English |
|---|---|
| Title of host publication | IEEE Int Conf Comput Aided Des ICCAD 89 Dig Tech Pap |
| Editors | Anon |
| Publisher | Publ by IEEE |
| Pages | 556-559 |
| Number of pages | 4 |
| ISBN (Print) | 0818659866 |
| Publication status | Published - 1989 |
| Externally published | Yes |
| Event | IEEE International Conference on Computer-Aided Design (ICCAD-89): Digest of Technical Papers - Santa Clara, CA, USA Duration: Nov 5 1989 → Nov 9 1989 |
Other
| Other | IEEE International Conference on Computer-Aided Design (ICCAD-89): Digest of Technical Papers |
|---|---|
| City | Santa Clara, CA, USA |
| Period | 11/5/89 → 11/9/89 |
All Science Journal Classification (ASJC) codes
- Engineering(all)