Method for detecting defects in silicon-on-insulator using capacitance transient spectroscopy

Hiroshi Nakashima, Dong Wang, Takashi Noguchi, Kousuke Itani, Junli Wang, Liwei Zhao

Research output: Contribution to journalArticlepeer-review

13 Citations (Scopus)


A method for detecting defects such as interface states and a deep trap in Si-on-insulator (SOI) has been proposed, which is based on deep-level transient spectroscopy (DLTS) analysis of the metal-oxide semiconductor (MOS) structure. It is shown, for a bonded p-type SOI wafer consisting of 5 μm top-Si (T-Si) and 1 μn buried oxide (BOX) layers, that the interface state densities between T-Si/BOX and BOX/back-Si (B-Si) can be measured. Furthermore, the validity of this DLTS technique for the detection of a discrete deep level has been confirmed by using a Fe-doped SOI wafer. It is shown that the Fe concentration in B-Si is consistent with that of bulk Si, while the Fe concentration in T-Si shows significant enhancement. Through these investigations of SOI wafers, the validity of this DLTS method has been demonstrated.

Original languageEnglish
Pages (from-to)2402-2408
Number of pages7
JournalJapanese Journal of Applied Physics
Issue number5 A
Publication statusPublished - May 2004

All Science Journal Classification (ASJC) codes

  • General Engineering
  • General Physics and Astronomy


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