TY - JOUR
T1 - Low-temperature fabrication of Y2O3/Ge gate stacks with ultrathin GeOx interlayer and low interface states density characterized by a reliable deep-level transient spectroscopy method
AU - Wang, Dong
AU - Nagatomi, Yuta
AU - Kojima, Shuta
AU - Yamamoto, Keisuke
AU - Nakashima, Hiroshi
N1 - Funding Information:
This work was supported by JSPS KAKENHI Grant Number 25249035 . XPS measurements were carried out using the facilities at the Center of Advanced Instrumental Analysis of Kyushu University.
PY - 2014/4/30
Y1 - 2014/4/30
N2 - Y2O3/Ge gate stacks with ultrathin GeOx interlayer were fabricated by two-step rf sputtering using a Y2O 3 target followed by a vacuum-annealing, which were carried out in the same chamber without vacuum breaking. TiN-gate Ge metal-insulator- semiconductor (MIS) capacitors were fabricated with equivalent oxide thicknesses in the range of 2.1-2.3 nm. The highest temperature was 400 °C for the entire fabrication process. Interface states density (Dit) was characterized using a deep-level transient spectroscopy method with optimized injection pulse and quiescent reverse-bias voltages at each temperature. D it values were approximately 4 × 1013, 5 × 1011, and 3 × 1012 cm- 2 eV- 1 at energy positions around valence band, mid-gap, and conduction band, respectively. The slow trap contribution was also small in the upper half of the band-gap, implying a potential application of the Y2O3/Ge gate stack to the fabrication of high-performance Ge-n-MIS field effect transistors.
AB - Y2O3/Ge gate stacks with ultrathin GeOx interlayer were fabricated by two-step rf sputtering using a Y2O 3 target followed by a vacuum-annealing, which were carried out in the same chamber without vacuum breaking. TiN-gate Ge metal-insulator- semiconductor (MIS) capacitors were fabricated with equivalent oxide thicknesses in the range of 2.1-2.3 nm. The highest temperature was 400 °C for the entire fabrication process. Interface states density (Dit) was characterized using a deep-level transient spectroscopy method with optimized injection pulse and quiescent reverse-bias voltages at each temperature. D it values were approximately 4 × 1013, 5 × 1011, and 3 × 1012 cm- 2 eV- 1 at energy positions around valence band, mid-gap, and conduction band, respectively. The slow trap contribution was also small in the upper half of the band-gap, implying a potential application of the Y2O3/Ge gate stack to the fabrication of high-performance Ge-n-MIS field effect transistors.
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U2 - 10.1016/j.tsf.2013.10.065
DO - 10.1016/j.tsf.2013.10.065
M3 - Article
AN - SCOPUS:84897912538
SN - 0040-6090
VL - 557
SP - 288
EP - 291
JO - Thin Solid Films
JF - Thin Solid Films
ER -