TY - GEN
T1 - Line sharing cache
T2 - 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
AU - Oka, Keitarou
AU - Sasaki, Hiroshi
AU - Inoue, Koji
PY - 2013
Y1 - 2013
N2 - This paper proposes a new last level cache architecture called line sharing cache (LSC), which can reduce the number of cache misses without increasing the size of the cache memory. It stores lines which contain the identical value in a single line entry, which enables to store greater amount of lines. Evaluation results show performance improvements of up to 35% across a set of SPEC CPU2000 benchmarks.
AB - This paper proposes a new last level cache architecture called line sharing cache (LSC), which can reduce the number of cache misses without increasing the size of the cache memory. It stores lines which contain the identical value in a single line entry, which enables to store greater amount of lines. Evaluation results show performance improvements of up to 35% across a set of SPEC CPU2000 benchmarks.
UR - http://www.scopus.com/inward/record.url?scp=84877772234&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84877772234&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2013.6509677
DO - 10.1109/ASPDAC.2013.6509677
M3 - Conference contribution
AN - SCOPUS:84877772234
SN - 9781467330299
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 669
EP - 674
BT - 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Y2 - 22 January 2013 through 25 January 2013
ER -