Improving linearity of a 5.2 GHz low power mixer in 0.18μm CMOS process by using Derivative Superposition method

Takahiro Masumoto, Daisuke Kanemoto, Haruichi Kanaya, Ramesh Pokharel, Keiji Yoshida

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper describes the design and implementation of a low power mixer improved its linearity. The mixer which have implemented is based on bulk-driven mixer which is known for its low power operation. On the other hand, that mixer has a demerit of poor linearity. The architecture of the proposed mixer employs DS (Derivative Superposition) method to achieve high linearity remaining in low power consumption. The proposed design has been fabricated using TSMC 0.18μm CMOS process. The measured IIP3 shows 6.38 dBm. A conversion gain shows -7.49 dB, and power consumption of 3.54 mW.

Original languageEnglish
Title of host publication2012 Asia-Pacific Microwave Conference, APMC 2012 - Proceedings
Pages157-159
Number of pages3
DOIs
Publication statusPublished - Dec 1 2012
Event2012 Asia-Pacific Microwave Conference, APMC 2012 - Kaohsiung, Taiwan, Province of China
Duration: Dec 4 2012Dec 7 2012

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC

Other

Other2012 Asia-Pacific Microwave Conference, APMC 2012
Country/TerritoryTaiwan, Province of China
CityKaohsiung
Period12/4/1212/7/12

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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