Gate operation of InAs/AlGaSb heterostructures with an atomic-layer- deposited insulating layer

Engineering

• Insulating Layer 100%
• Heterostructures 100%
• Density 50%
• Electron Trap 50%
• Hysteresis 50%
• Atomic Layer 50%
• Atomic Layer Deposition 50%
• Interface Trap 50%
• Equivalent Circuit Model 50%
• Rinse Water 50%
• Cap Layer 50%

Chemical Engineering

• Hysteresis 50%
• Atomic Layer Deposition 50%

Material Science

• Surface Treatment 50%