Electrical and structural evaluations of high-k gate dielectrics fabricated using plasma oxidation and the subsequent annealing for a Hf/SiO2/Si structure

H. Nakashima, D. Wang, Y. Sugimoto, Y. Suehiro, K. Yamamoto, M. Kajiwara, K. Hirayama

Research output: Contribution to journalArticlepeer-review

4 Citations (Scopus)

Abstract

High-permittivity (high-k) dielectrics with HfO2/Hf xSi1-xOy/Si structures were fabricated using plasma oxidation and the subsequent annealing for a Hf/SiO 2/Si structure. By changing a SiO2 film in an initial structure from plasma oxidation at a low temperature to dry oxidation at a high temperature, the drastic decrease in the trap density in an interfacial layer (IL: HfxSi1-xOy) could be successfully achieved, which showed an interface state density of 1 × 1011 eV-1 cm-2, an effective oxide thickness (EOT) of 1.2 nm and four orders decrease in the leakage current density relative to SiO2 with the same EOT. The influence of post-annealing on structural and electrical properties of the IL was investigated by using x-ray photoelectron spectroscopy and a transmission electron microscope. It was clarified that the increase in EOT after post-annealing at 900 °C was caused by the decrease in Hf content in the IL and the increase in the IL thickness. The kinetics of the IL formation is discussed in detail. The effects of O 2 gas ambience during post-annealing on EOT and flat-band voltage (Vfb) were investigated, which showed that the Vfb decreased with increasing O2 gas pressure while maintaining a low EOT.

Original languageEnglish
Article number125020
JournalSemiconductor Science and Technology
Volume23
Issue number12
DOIs
Publication statusPublished - Dec 1 2008

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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