This paper proposes a novel waveform multiplexing method to realize high channel-density front-end application specific integrated circuit (ASIC) design. In the proposed method, multiplexing is achieved through connecting multiple preamplifiers to a single analog-to-digital converter (ADC). These preamplifiers have different decay time (90%-10%) which will be used as the tag information. The channel information can be identified by analyzing the decay time using digital signal processing. Based on this method, two prototype ASICs have been designed with 2-to-1 multiplexing. They are a 36-channel multiplexing charge sensitive preamplifier ASIC (MCSP) and a 24-channel multiplexing waveform sampling front-end ASIC (MWSFE). In testing, the MCSP chip was found to have an optimum ENC of 1250 e - FWHM and 1334 e - FWHM, respectively, for the two multiplexed preamplifiers with a shaping time constant of 0.5 μs. The output voltage to input charge gains of the preamplifiers were measured to be 0.84 V/pC and 0.9 V/pC, while the rise times (10%-90%) were 35 ns and 40 ns, respectively. This chip was also successfully used to read LYSO-APD detectors with two multiplexed preamplifiers, resulting in the energy resolution values of the 511 keV peak being 16.8% and 18.3%, respectively. The waveforms from the two preamplifiers are clear enough to be distinguished from each other. The 24-channel MWSFE chip supports pulse shape discrimination (PSD) function as it has a variable gain amplifier (VGA) and a waveform sampling ADC inside the ASIC to provide waveform digitization. This chip was tested to demonstrate the signal processing chain of waveform multiplexing method.
All Science Journal Classification (ASJC) codes
- Nuclear and High Energy Physics
- Nuclear Energy and Engineering
- Electrical and Electronic Engineering