Development of 600V-class trench filling SJ-MOSFET with SSRM analysis technology

Syotaro Ono, Li Zhang, Hiroshi Ohta, Miho Watanabe, Wataru Saito, Shingo Sato, Hiroyuki Sugaya, Masakazu Yamaguchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

600V-class superjunction (SJ)-MOSFETs were developed using our original high-resolution Scanning Spread Resistance Microscopy (SSRM) analysis technology [1] for optimization of trench filling process for the first time. The SSRM analysis is a powerful tool for the SJ structure design, because it can be achieved the measurement of two- dimensional (2D)-carrier profile and detect of minute voids. The measured profile was applicable for device simulation of the SJ-Diode and the estimated breakdown voltage was in good agreement with the experimental values. By the feed back of these results to the trench filling process, the breakdown voltage was increased and the trade-off characteristics between the breakdown voltage and the specific on-resistance were achieved to 685V/16.5mΩcm2 in the fabricated SJ-MOSFET.

Original languageEnglish
Title of host publicationISPSD '09 - Proceedings of the 21st International Symposium on Power Semiconductor Devices and IC's
Pages303-306
Number of pages4
DOIs
Publication statusPublished - Dec 1 2009
Externally publishedYes
Event21st International Symposium on Power Semiconductor Devices and IC's, ISPSD '09 - Barcelona, Spain
Duration: Jun 14 2009Jun 18 2009

Publication series

NameProceedings of the International Symposium on Power Semiconductor Devices and ICs
ISSN (Print)1063-6854

Conference

Conference21st International Symposium on Power Semiconductor Devices and IC's, ISPSD '09
Country/TerritorySpain
CityBarcelona
Period6/14/096/18/09

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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