High third- order intercept output point (OIP3) RF amplifier, suitable for cheap semiconductor technology is proposed. The circuit functionality simulated using Agilent ADS and parasitic components were taken into account using Assura RCX chip design software. Chip has designed for TSMC 0.35-um BiCMOS process. An OIP3 over +30dBm was achieved with a gain of 8 dB, noise figure 5dB, and a power consumption 80 mW. Amplifier is intended to be used in receiver and transmitter paths of the 802.11a/b/n wireless LAN front-end in 5 GHz band.