This paper proposes a compact, high quality (Q-) factor cavity in commercial CMOS technology for terahertz band applications. The proposed cavity consists of a folded quarter-mode substrate integrated waveguide (QMSIW) topology. It also outlines some guidelines for creating layouts with specific foundries, particularly for building vertical walls using an array of vias. The cavity was implemented in 0.18 µm CMOS technology and measurements were taken. The measurements showed that the resonant frequency and reflection coefficient were 96.9 GHz and -30.14 dB, respectively, in good agreement with the simulation results. The area of the proposed cavity was 0.0506 mm2 without measurement pads, which is only 2.4% and 8.9% when compared to the standard full-mode SIW cavity and the recently proposed 87 GHz.