Design of 5.5GHz LC oscillator using distributed grid of N-well in P-substrate inductor

S. A.Enche Ab Rahim, Adel Barakat, Ramesh K. Pokharel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents the design of low noise LC oscillator that employs an enhanced inductor, where a distributed grid of N-well in P-substrate of the inductor was design to improve the quality factor of the inductor, therefore improves the phase noise of the oscillator. The electromagnetic (EM) simulation shows that the total equivalent resistance of an inductor is reduced, which results in a higher quality factor. A 5.5GHz cross-coupled CMOS LC oscillator is designed by using this new inductor. Based on the simulation results, the oscillator shows an improvement of 0.7 dBc/Hz in phase noise at 1MHz offset from the carrier, which results a FOM of 189.

Original languageEnglish
Title of host publication2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages262-264
Number of pages3
ISBN (Electronic)9781509015702
DOIs
Publication statusPublished - Jan 3 2017
Event2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of
Duration: Oct 25 2016Oct 28 2016

Publication series

Name2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

Other

Other2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
Country/TerritoryKorea, Republic of
CityJeju
Period10/25/1610/28/16

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Signal Processing

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