Cu filling characteristics in through-Si via holes by electroless plating with addition of inhibitors

F. Inoue, M. Koyanagi, T. Fukushima, K. Yamamoto, S. Tanaka, Z. Wang, S. Shingubara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In order to realize low resistance through-Si via (TSV) electrodes, Cu electroplating is one of the most promising methods. However, with an increase of the aspect ratio of TSV, a formation of conductive seed layer prior to Cu electroplating is becoming more and more difficult. We propose an alternative approach using the electroless plating of Cu, which utilize displacement plating without catalyst. This method is effective for fabricating a low resistance TSV when combined with a barrier layer which is composed of tungsten (W). We found that an addition of Cl ions drastically suppressed the pinch-off at the entrance of the TSV, and it enabled conformai Cu deposition for high aspect ratio TSVs.

Original languageEnglish
Title of host publicationECS Transactions - Electronics Packaging 3 - 214th ECS Meeting
Pages27-32
Number of pages6
Edition22
DOIs
Publication statusPublished - 2009
Externally publishedYes
EventElectronics Packaging 3 - 214th ECS Meeting - Honolulu, HI, United States
Duration: Oct 12 2008Oct 17 2008

Publication series

NameECS Transactions
Number22
Volume16
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherElectronics Packaging 3 - 214th ECS Meeting
Country/TerritoryUnited States
CityHonolulu, HI
Period10/12/0810/17/08

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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