Abstract
In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods for CMOS circuits [1][2][3][4]. However, we do not know how accurate they are because we have not established a method to compare the estimated results of power consumption with that of actual VLSI chip. To evaluate the accuracy of several kind of power dissipation model such as chip-level, block-level and gate-level etc., we examined as follows: (i) Measuring power consumption of actual microprocessors. (ii) Estimating power consumption with several kinds of power dissipation model. (iii) Comparing (i) with (ii). The experimental results show as follows: (1) Power estimation at gate level is accurate enough. (2) Estimating power of a clock tree independently makes estimation more accurate.
Original language | English |
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Pages | 117-120 |
Number of pages | 4 |
Publication status | Published - 1996 |
Externally published | Yes |
Event | Proceedings of the 1996 International Symposium on Low Power Electronics and Design - Monterey, CA, USA Duration: Aug 12 1996 → Aug 14 1996 |
Other
Other | Proceedings of the 1996 International Symposium on Low Power Electronics and Design |
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City | Monterey, CA, USA |
Period | 8/12/96 → 8/14/96 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials