A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications

Daisuke Kanemoto; Keigo Oshiro; Keiji Yoshida; Haruichi Kanaya

doi:10.1109/ASPDAC.2015.7058973

A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications

Daisuke Kanemoto, Keigo Oshiro, Keiji Yoshida, Haruichi Kanaya

Integrated Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This document summarizes, for the university design contest, a chip design of a low power dissipation and small die area 10-bit capacitive digital-to-analog converter (DAC) in a 0.18 μm CMOS process. Power dissipation of this chip is 350 μW including the output buffers. The die area is 0.081mm².

Original language	English
Title of host publication	20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	34-35
Number of pages	2
ISBN (Electronic)	9781479977925
DOIs	https://doi.org/10.1109/ASPDAC.2015.7058973
Publication status	Published - Mar 11 2015
Event	2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 - Chiba, Japan Duration: Jan 19 2015 → Jan 22 2015

Publication series

Name	20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

Other

Other	2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
Country/Territory	Japan
City	Chiba
Period	1/19/15 → 1/22/15

All Science Journal Classification (ASJC) codes

Computer Science Applications
Electrical and Electronic Engineering
Control and Systems Engineering
Modelling and Simulation

Access to Document

10.1109/ASPDAC.2015.7058973

Cite this

Kanemoto, D., Oshiro, K., Yoshida, K., & Kanaya, H. (2015). A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications. In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 (pp. 34-35). Article 7058973 (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2015.7058973

A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications. / Kanemoto, Daisuke; Oshiro, Keigo; Yoshida, Keiji et al.
20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 34-35 7058973 (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kanemoto, D, Oshiro, K, Yoshida, K & Kanaya, H 2015, A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications. in 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015., 7058973, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Institute of Electrical and Electronics Engineers Inc., pp. 34-35, 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, 1/19/15. https://doi.org/10.1109/ASPDAC.2015.7058973

Kanemoto D, Oshiro K, Yoshida K, Kanaya H. A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications. In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 34-35. 7058973. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015). doi: 10.1109/ASPDAC.2015.7058973

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A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications

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