A system-level energy minimization approach using datapath width optimization

Y. Cao, H. Yasuura

Research output: Contribution to conferencePaperpeer-review

20 Citations (Scopus)


This paper presents a novel system-level approach that minimizes the energy consumption of embedded core-based systems through datapath width optimization. It is based on the idea of minimizing energy consumed by redundant bits, which are unused during execution of programs by means of optimizing the datapath width of processors. To minimize the redundant bits of variables in a given application program, the effective size of each variable is determined by variable size analysis, and Valen-C language is used to preserve the precision of computation. Analysis results of variables show that there are average 39% redundant bits in the C source program of MPEG-2 video decoder. In our experiments for several embedded applications, energy savings without performance penalty are reported range from about 10.8% to 48.3%.

Original languageEnglish
Number of pages6
Publication statusPublished - 2001
Externally publishedYes
EventInternational Symposium on Low Electronics and Design (ISLPED'01) - Huntington Beach, CA, United States
Duration: Aug 6 2001Aug 7 2001


OtherInternational Symposium on Low Electronics and Design (ISLPED'01)
Country/TerritoryUnited States
CityHuntington Beach, CA

All Science Journal Classification (ASJC) codes

  • Engineering(all)


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