TY - GEN
T1 - A soft error tolerance estimation method for sequential circuits
AU - Yoshimura, Masayoshi
AU - Akamine, Yusuke
AU - Matsunaga, Yusuke
PY - 2011
Y1 - 2011
N2 - In advanced technology, soft error tolerance of VLSIs decreases. Soft errors might cause VLSIs to failure. However, there is no exact method to estimate soft error tolerance for sequential circuits of VLSIs. We propose an exact method to estimate soft error tolerance for sequential circuits. The failure due to soft errors in sequential circuits is defined by using the modified product machine. The behavior of the modified product machine is analyzed using Markov model strictly. We also propose two acceleration techniques to apply the exact method to larger scale circuits. Two acceleration techniques reduce the number of variables of simultaneous linear equations. We apply the proposed method to ISCAS'89 and MCNC benchmark circuits and estimate soft error tolerance for sequential circuits. Experimental results shows that two acceleration techniques reduce up to 10 times from its original execution time.
AB - In advanced technology, soft error tolerance of VLSIs decreases. Soft errors might cause VLSIs to failure. However, there is no exact method to estimate soft error tolerance for sequential circuits of VLSIs. We propose an exact method to estimate soft error tolerance for sequential circuits. The failure due to soft errors in sequential circuits is defined by using the modified product machine. The behavior of the modified product machine is analyzed using Markov model strictly. We also propose two acceleration techniques to apply the exact method to larger scale circuits. Two acceleration techniques reduce the number of variables of simultaneous linear equations. We apply the proposed method to ISCAS'89 and MCNC benchmark circuits and estimate soft error tolerance for sequential circuits. Experimental results shows that two acceleration techniques reduce up to 10 times from its original execution time.
UR - http://www.scopus.com/inward/record.url?scp=84855795062&partnerID=8YFLogxK
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U2 - 10.1109/DFT.2011.22
DO - 10.1109/DFT.2011.22
M3 - Conference contribution
AN - SCOPUS:84855795062
SN - 9780769545561
T3 - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
SP - 268
EP - 276
BT - Proceedings - 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011
T2 - 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011
Y2 - 3 October 2011 through 5 October 2011
ER -