TY - GEN
T1 - A replacement strategy for canary Flip-Flops
AU - Kunitake, Yuji
AU - Sato, Toshinori
AU - Yasuura, Hiroto
N1 - Copyright:
Copyright 2011 Elsevier B.V., All rights reserved.
PY - 2010
Y1 - 2010
N2 - The deep submicron semiconductor technologies increase parameter variations. The increase in parameter variations requires excessive design margin that has serious impact on performance and power consumption. In order to eliminate the excessive design margin, we are investigating canary Flip-Flop (FF). Canary FF requires additional circuits consisting of an FF and a comparator. Thus, it suffers large area overhead. In order to reduce the area overhead, this paper proposes a selective replacement method for canary FF and evaluates it. In the case of Renesas's M32R processor, the area overhead of 2% is achieved.
AB - The deep submicron semiconductor technologies increase parameter variations. The increase in parameter variations requires excessive design margin that has serious impact on performance and power consumption. In order to eliminate the excessive design margin, we are investigating canary Flip-Flop (FF). Canary FF requires additional circuits consisting of an FF and a comparator. Thus, it suffers large area overhead. In order to reduce the area overhead, this paper proposes a selective replacement method for canary FF and evaluates it. In the case of Renesas's M32R processor, the area overhead of 2% is achieved.
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U2 - 10.1109/PRDC.2010.46
DO - 10.1109/PRDC.2010.46
M3 - Conference contribution
AN - SCOPUS:79951820640
SN - 9780769542898
T3 - Proceedings - 16th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2010
SP - 227
EP - 228
BT - Proceedings - 16th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2010
T2 - 16th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2010
Y2 - 13 December 2010 through 15 December 2010
ER -