Abstract
Superjunction (SJ) MOSFETs with extremely low on-resistance and high avalanche withstanding capability have been designed and experimentally demonstrated. The p- and n-columns for the SJ structure are designed to reduce the on-resistance and to maximize both the breakdown voltage and the avalanche withstanding capability. The demonstrated SJ-MOSFET realized the lowest on-resistance of 20∼mΩcm2 among previously reported 600 V-class SJ-MOSFETs. The device also withstands high avalanche current of 185∼A/cm2.
Original language | English |
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Pages | 459-462 |
Number of pages | 4 |
Publication status | Published - 2004 |
Externally published | Yes |
Event | Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs (ISPSD'04) - Kitakyushu, Japan Duration: May 24 2004 → May 27 2004 |
Conference
Conference | Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs (ISPSD'04) |
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Country/Territory | Japan |
City | Kitakyushu |
Period | 5/24/04 → 5/27/04 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering