TY - JOUR
T1 - 3.3-mA 2.8-GHz bufferless LC oscillator directly driving a 10-mm on-chip clock distribution line
AU - Ichihashi, Masahiro
AU - Harada, Shogo
AU - Kanaya, Haruichi
N1 - Funding Information:
This work was partially supported by the Grant-in-Aid for Scientific Research (KAKENHI, 18K04146) from the Japan Society for the Promotion of Science (JSPS), VLSI Design and Education Center (VDEC), Integrand Software, Inc. and the Grant-in-Aid for the Collaborative Research Program Based on Industrial Demand, CREST (JPMJCR1431) and the Matching planner program from the Japan Science and Technology Agency, JST and NEDO (New Energy and Industrial Technology Development Organization), and SIP (Cross-ministerial Strategic Innovation Promotion Program). We would like to thank Editage (www.editage.jp) for English language editing.
Publisher Copyright:
Copyright © 2019 The Institute of Electronics, Information and Communication Engineers
PY - 2019
Y1 - 2019
N2 - A bufferless LC oscillator can potentially offer an attractive solution for low-power, high-speed clock distribution due to the absence of repeaters on the clock distribution line and utilization of LC resonance. However, conventional bufferless LC oscillators suffer from a fundamental tradeoff between the frequency and power consumption due to their high-frequency sensitivity. In this paper, we have introduced a low-frequency sensitivity bufferless LC oscillator that is directly connected to a 10-mm on-chip clock distribution line in the TSMC 0.18-µm 1-Poly 6-Metal CMOS technology. The core area of the LC oscillator is only 270 × 280 µm2. The measurement results show that a 2.8-GHz oscillation frequency, 3.3-mA current consumption, and −112.8 dBc/Hz phase noise at 1 MHz offset can be achieved.
AB - A bufferless LC oscillator can potentially offer an attractive solution for low-power, high-speed clock distribution due to the absence of repeaters on the clock distribution line and utilization of LC resonance. However, conventional bufferless LC oscillators suffer from a fundamental tradeoff between the frequency and power consumption due to their high-frequency sensitivity. In this paper, we have introduced a low-frequency sensitivity bufferless LC oscillator that is directly connected to a 10-mm on-chip clock distribution line in the TSMC 0.18-µm 1-Poly 6-Metal CMOS technology. The core area of the LC oscillator is only 270 × 280 µm2. The measurement results show that a 2.8-GHz oscillation frequency, 3.3-mA current consumption, and −112.8 dBc/Hz phase noise at 1 MHz offset can be achieved.
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U2 - 10.1587/elex.16.20190301
DO - 10.1587/elex.16.20190301
M3 - Article
AN - SCOPUS:85077446769
SN - 1349-2543
VL - 16
JO - IEICE Electronics Express
JF - IEICE Electronics Express
IS - 16
M1 - 20190301
ER -